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Each atomic layer in van der Waals heterostructures possesses a distinct electronic band structure that can be manipulated for unique device operations. In the precise device architecture, the subtle but critical band coupling between the atomic layers, varied by the momentum of electrons and external electric fields in device operation, has not yet been presented or applied to designing original devices with the full potential of van der Waals heterostructures. I will introduce interlayer coupling spectroscopy at the device-scale based on the negligible quantum capacitance of two-dimensional semiconductors in lattice-orientation-tuned, resonant tunneling transistors. The effective band structures of the mono-, bi-, and quadrilayer of MoS2 and WSe2, modulated by the orientation- and external electric field-dependent interlayer coupling in device operations, could be demonstrated by the new conceptual spectroscopy overcoming the limitations of the former optical, photoemission, and tunneling spectroscopy [1]. Based on the vertical heterojunction, novel orbital-gating based phototransistors and self-selective memristors [2,3] could be developed. [1] Adv. Mater. (2020) [2] Nat. Commun. (2019) [3] Sci. Adv. (2021) Biography Heejun Yang was awarded the IUPAP Young Scientist Prize in Semiconductor Physics 2018 for his outstanding contribution to novel interface devices based on structural, electronic, and quantum-state control with van der Waals layered materials. He received his PhD in physics with a subject on graphene by scanning tunneling microscopy and spectroscopy (STM/STS) from Seoul National University (Korea) and University Paris-Sud XI (France, a joint degree) in 2010, and experienced industrial device studies in Samsung Electronics from 2010 to 2012. Then, he conducted his research on graphene spintronics in Albert Fert’s (2007 Novel laureate) group in CNRS/Thales as a postdoc from 2012 to 2014. With his research background on molecular and nanometer-scale studies (in Seoul and Paris) and electric and spintronic device physics (in Samsung and CNRS/Thales), he moved to Sungkyunkwan University (2014~2021) and KAIST (2021~) and started original device studies with phase engineering of low-dimensional materials. Read more
The second quantum revolution, the transition from quantum theory to quantum engineering, is leading us towards practical quantum computing. However, there are still many obstacles hindering practical quantum computing. In this talk, I will briefly review the challenges and research opportunities in the state-of-the-art quantum computing engineering technology stacks, including quantum computing devices, peripheral control hardware architecture, compiler design/optimization, programming language design, etc. I will then introduce our recent works, i.e., efficient qubit mapping, superconducting quantum processor architecture design, and quantum program assertions, in tackling some of these challenges. Biography Yufei Ding joined UCSB as an Assistant Professor in Nov 2017 and co-direct the SEAL lab together with Prof. Yuan Xie. She received her Ph.D. in Computer Science from North Carolina State University, and B.S. and M.S. in Physics from the University of Science and Technology of China and the College of William and Mary, respectively. Her research interests lie in the broad fields of domain-specific language design, architecture and compiler optimization, and hardware acceleration. Her current research focuses on building high-performance, energy-efficient, and high-fidelity programming frameworks for emerging technologies such as quantum computing, and machine learning. She is a recipient of the NSF CAREER Award (2020), IEEE Computer Society TCHPC Early Career Researchers Award for Excellence in High-Performance Computing (2019), NCSU Computer Science Outstanding Dissertation Award (2018), NCSU Computer Science Outstanding Research Award (2016). Her work on quantum program debugging and testing got the Distinguished Paper Award at OOPLSA (2020). Read more
Internet of things demand large performance improvements in integrated circuit systems. Two possible approaches exist for advancing IC fabrication for future electronics. I would discuss on materials development associated with these two approaches. (1) Continue the transistor scaling (Moore’s Law). With the scaling for future technology nodes, the gate controllability becomes weaker owing to the pronounced source-drain tunneling. Hence, the transistor body thickness needs to be reduced to ensure efficient electrostatic control. Thin materials with perfect surfaces such as transition metal dichalcogenide (TMD) monolayers offer a great chance to continue the scaling.[1] The growth of wafer-scale single-crystal 2D materials, including insulating hexagonal Boron Nitride (h-BN)[2] and semiconducting TMD[3-4], and the new metal contact [5] to 2D layers have thus become a central research topic in modern electronics. (2) Construct 3D integrated circuits with a monolithic approach. Few examples include, adding sensor functionalities, constructing upper-layer logic circuits or memory devices on CMOS Si wafers, or stacking logic with memory devices.[6] Obviously, the research on materials and processes compatible with the backend-of-line (BOEL) fabrication temperature (< 400 oC), is needed. Here, I like to use a case to illustrate the benefits of monolithic 3D integration, where we add carbon nanotube transistors on TSMC 28 nm CMOS technology wafers to save the footprint and power consumption. [7] [1] M.-Y. Li et al. Nature 567, 169 (2019) [2] T.-A. Chen et al. Nature 579, 219 (2020). [3] Areej Aljarb et al. Nature Mater. 19, 1300 (2020) [4] M.-Y. Li et al. Science 349, 524 (2015) [5] P.J Shen et al, Nature (2021) [6] Deji Akinwande et al., Nature 573, 507 (2019) [7] C. C. Cheng et al. IEDM (2019) Biography Prof. Li is currently a Chair Professor in nanomaterials for future electronics in Department of Mechanical Engineering, The University of Hong Kong. Dr. Li received his BA (1994) and MSc (1996) from National Taiwan University and D.Phil (2006) from Oxford University. He has taken multiple faculty and research fellow positions at National Technological University, Academia Sinica (Taiwan), King Abdullah University of Science and Technology (Saudi Arabia), University of New South Wales (Australia) before he joins HKU. He was CTO of Nitronix Nanotechnology, Taiwan, from 2015- Dec 2017 and Director of Corporate Research in Taiwan Semiconductor Manufacturing Company (Taiwan) from Dec 2017-Dec 2020. His research interests lie in two-dimensional materials (graphene, boron nitrides, transition metal dichalcogenides etc.) for future electronics. He has published more than 400 papers, including Nature and Science, and received citations more than 55,000 times. He is a highly cited scholar since 2018. Read more
Flexible bioelectronics have greatly improved the way of human-machine interaction due to the fact that they can provide seamless interactions with humans. Especially, flexible and stretchable inorganic thin-film electronics play an increasingly important role because of the advantages of mature processibility and rich physicochemical properties of inorganic functional materials. However, stable strategy to render flexibility and stretchability while maintaining excellent performance of inorganic thin films is the most demanding and challenging both for academic and industrial communities. In this report, we will present how to achieve flexibility and stretchability in inorganic thin film devices and recent development of flexible inorganic thin film devices focusing on their biomedical applications, including biosensing and non-pharmacological stimulation treatments. A future perspective into the challenges and opportunities for the next-generation flexible bioelectronics will also be discussed. Biography Dr. Lin is currently a professor and the Dean of School of Materials and Energy, University of Electronic Science and Technology of China. Dr. Lin received her Ph.D. degree in Condensed Matter Physics from University of Science and Technology of China in 1999. After that, she had worked in the University of Houston and Los Alamos National Lab as a postdoc, and in Intel Corp as a senior engineer. In 2008, she joined the faculty of University of Electronic Science and Technology of China as a Yangtze River Scholars Distinguished Professor. Dr. Lin is active in the field of electronic thin films and devices. Her main research interests are focused in the development of various thin films (such as ferroelectric oxide, vanadium oxide and other oxides) for applications in electronic devices, especially in stretchable and flexible electronic devices. She has co-authored more than 150 papers in peer-reviewed journals and her publications have been cited for more than 2000 times. She also has more than 20 Chinese patents and 4 US patents awarded. Read more
The rapid development in the field of artificial intelligence has relied principally on the advances in computing hardware However, their system scale and energy efficiency are still limited compared to the brain Memristor or redox resistive switch, provides a novel circuit building block that may address these challenges in neuromorphic computing and machine learning In this talk, I will first briefly introduce the promises and challenges with regards to the use of memristors in realizing bio inspired computing Secondly, I will show examples of memristor based neuromorphic computing Novel memristors have been used to simulate certain synaptic and neural dynamics, which led to prototypical hardware spiking neural networks practicing local learning rules and reservoir computing Thirdly, I will discuss the 128 × 64 1 transistor 1 memristor array for hardware accelerating machine learning This prototypical processing in memory system implemented deep Q reinforcement learning for control problems, as well as supervised training of convolutional and/or recurrent networks for classification. Biography Dr Zhongrui Wang is an assistant professor with the department of Electrical and Electronic Engineering at the University of Hong Kong Prior to joining HKU, Dr Wang received both B Eng (First class Honor) and Ph D from Nanyang Technological University in 2009 and 2014 respectively He did his postdoctoral research at University of Massachusetts Amherst His research interest lies in emerging memory based neuromorphic computing and machine learning, as well as modelling memristive materials using density functional theory He has authored and coauthored over 50 technical papers, including first authored articles on Nature Review Materials, Nature Materials, Nature Electronics, Nature Machine Intelligence, and Nature Communications, which have received 4200 citations His results have also been reported more than 40 times by mainstream scientific and popular media sources Read more
Analog computing pre-dates digital computing but has been long forgotten due to the fast development of the latter. While very powerful, digital computing is highly inefficient at performing perception related tasks, and the problem becomes increasingly significant with the fast development of artificial intelligence and transistor scaling approaching their physical (and economic) limit. Since memristors were experimentally shown in 2008 by Hewlett Packard Labs, researchers have been extensively exploring their capability to store and process information in the analog domain. Despite great promises shown in the laboratory environment, memristor crossbar, or non-volatile resistive analog memory, based matrix multiplication accelerators, has remained a high risk, particularly in device performance and peripheral circuitry. In this talk, I will present our recent progress in tackling those challenges. First, we have operated using directly integrated CMOS and nanoscale memristors for fully on-chip read/write/computing demonstrations. We operate in a much lower power regime, program with fine control, and demonstrated a multi-layer convolutional neural network. Due to the intrinsic stochastic nature of the memristor device, unexpected computing errors still occur, which, in many cases, are fatal in many applications. To make the computing system tolerant of device defects, we explored two possible solutions. The first method is the in-situ training directly on the crossbar, to self-adapt defects during the training process. The second method is a novel analog error correcting code, that detects and corrects error outliers that exceed a predefined threshold. We expect the schemes introduced here to make analog computing more feasible. Biography Dr. Can Li is currently an Assistant Professor at the Department of Electrical and Electronic Engineering (EEE) of the University of Hong Kong (HKU), working on analog and neuromorphic computing accelerators based on post-CMOS emerging devices (e.g. memristors), for efficient machine/deep learning, network security, signal processing, etc. Before that, He spent two years at Hewlett Packard Labs in Palo Alto, California, and obtained his Ph.D. from University of Massachusetts, Amherst, and B.S./M.S. from Peking University. Read more
Neural Networks (NNs) have been widely employed in modern artificial intelligence (AI) systems due to their unprecedented capability in classification, recognition and detection. However, the massive data communication between the processing units and the memory has been proven to be the main bottleneck to improve the efficiency of NNs based hardware. Furthermore, the significant power demand for massive addition and multiplication limits its adoption at the edge devices. In addition, the cost is another major concern for an edge device. Therefore, an edge neural processing chip with simultaneous low power, high performance, low cost is in urgent need for the fast-growing AI-and-IoT (AIoT) market. In this talk, we will introduce an ultra-low-power neural processing SoC chip in 40nm with computing-in-memory technology. We have designed, fabricated, and tested this chip based on 40nm eFlash technology. It solves the data processing and communication bottlenecks in NNs with computing-in-memory technology. Furthermore, It combines classic digital solution together with the analog computing-in-memory macro to achieve 12-bit high-precession computing. To enable a sub-mW system in AIoT applications, a Risc-V micro-processor with DSP instruction was designed with dynamic-voltage-and-frequency-scaling (DVFS) to adapt with various low-power and real-time computing tasks. The chip supports multiple NNs including DNN, TDNN, and RNN for different applications, e.g., smart voice, and health monitoring. Biography Dr. Wang received his B.S. degree from Peking University in 2011 and the Ph.D. degree in electrical engineering from UCLA in 2017. He founded WITINMEM Co. Ltd in 2017, and currently serves as the CEO of WITINMEM and is dedicated to developing chips with computing-in-memory technology. He published 20+ journal and conference papers and applied over 50 patents. He also served as reviewers and TPC in several IEEE and ACM journals and conferences. Read more
Spintronics has been widely studied for decades and various applications have been incubated from spintronics Particularly, spintronic memory has been considered as one of the most promising nonvolatile memory candidates to address the leakage power consumption in the post Moore’s era To date, spintronic memory family has evolved in four generation technology advancement and has achieved mass production in standalone and embedded applications On the other hand, from the architectural perspective, data transfer bandwidth and the related power consumption has become the most critical bottleneck in von Neumann computing architecture, owing to the separation of the processor and the memory units and the performance mismatch between the two Realization of the unity of data computing and storage in the same chip has opened up a promising research direction of computing in memory ( Spintronic memory could be a potential candidate to implement the CIM paradigm from both technology and application perspectives Lots of interests have been attracted and a number of attempts have been made in this field In this talk, I will briefly introduce why and how computing in spintronic memory, and our work on this direction. Biography Dr Wang KANG received the double Ph D degrees in Physics from University of Paris Sud France, and in Microelectronics from Beihang University, China Since 2018 he has been an Associate Professor in School of Integrated Circuit Science and Engineering at Beihang University His research interest includes spintronics and its related devices, circuits and advanced architectures He has co authored more than 80 scientific papers, including Proceedings of the IEEE, Nature Electronics, Physical Review Applied, IEEE TC, IEEE TCAS 1 IEEE EDL, DAC, DATE, ASP DAC, etc He severed as guest editors of Microelectronics Journal and SPIN, TPC of DAC, NVMSA etc He is a Senior Member of the IEEE Read more
Recent advances in AI technology bring great challenges on the computing platform. Conventional platform based on CMOS devices and von Neumann architecture becomes more and more difficult to further improve the computing efficiency. The concept of Computation-in-Memory (CIM) based on the emerging non-volatile memory devices, such as resistive random access memory (RRAM), provide new solutions for processing data-intensive tasks with very high energy-efficiency. However, due to the intrinsic non-ideal effects of RRAM devices and circuits, up to date, the integration density and computing accuracy of the RRAM based CIM systems still cannot compete with CMOS based AI chips. This talk will first introduce the principles of RRAM based CIM technology. The performance requirements and key challenges will be discussed. Then it will talk about our recent work on multi-scale modeling of analog RRAM devices. After that, the co-design framework from device level, to circuit, architecture, and algorithm levels will be presented. This talk will also show some hardware implementations and verifications based on the guidelines of our simulation tools. Finally, I will provide some views on possible research directions in the future development on CIM applications. Biography Bin Gao is currently an Associate Professor with the Institute of Microelectronics, Tsinghua University, Beijing, China. He received the B.S. degree in physics from Peking University, Beijing, China, in 2008, and Ph.D. degree in Microelectronics from Peking University in 2013. In 2010, he was a Visiting Scholar with Nanyang Technological University, Singapore, and also with the Institute of Microelectronics, A*STAR, Singapore. In 2012, he was a Visiting Scholar with Stanford University, Stanford, CA, USA. In 2015, he joined Tsinghua University as an Assistant Professor, and became an Associate Professor in 2017. His current research interests include modeling, design and fabrication of emerging semiconductor devices, especially RRAM. He has published more than 100 technical papers, including 38 papers on the IEDM, ISSCC and VLSI, as well as several journal papers on Nature, Nature Electronics, Nature Communications, Proceedings of the IEEE, etc. His total citation is over 5000. He was a recipient of the IEEE EDS Master Student Fellowship in 2009, and a recipient of the IEEE EDS Ph.D. Student Fellowship in 2012. He received China Industry-University Cooperation Innovation Award with GigaDevice in 2017. He serves as MS Sub-Committee Chair of EDTM 2021, and Technical Program Committee Members of IEDM, DAC, IRPS, etc. Read more
As Moore’s law-based device scaling and accompanying performance scaling trends slow down, and the rapid growth of data-intensive applications in the era of “Internet of Things” and “Big Data”, there are increasing interests in emerging technologies and computational paradigms that enable more efficient information processing. Meanwhile, in the context of traditional Boolean circuits and/or von Neumann architectures, it is challenging for beyond-CMOS devices to compete with the CMOS technology as simple replacements. Exploiting the unique characteristics of emerging devices – especially in the context of alternative circuits and architectural paradigms – indicates a promising approach to further improve the information processing capability of hardware. In this talk, I will show how our research work has leveraged the unique characteristics of emerging devices to build efficient circuits and architectures with significant improvements in area, energy and performance. Specifically, I will consider Ferroelectric FETs (FeFETs) which are nonvolatile and can function as both a transistor and a storage element. This unique property enables FeFETs to be used for building efficient computing-in-memory (CiM) circuits called content addressable memories (CAMs). CAMs perform the parallel search function across the memory blocks, thus are desirable in many applications including IP routers and advanced machine learning hardware. Using models calibrated by experimentally fabricated devices as well as cross-layer design approaches, we show that the FeFET-based CAM designs could enable orders of magnitude improvements in energy efficiency and performance when considering application-level computing tasks. Biography Xunzhao Yin is an assistant professor of the College of Information Science and Electronic Engineering at Zhejiang University. He received his Ph.D. degree in Computer Science and Engineering from University of Notre Dame in 2019 and B.S. degree in Electronic Engineering from Tsinghua University in 2013, respectively. His research interests include emerging circuit/architecture designs and novel computing paradigms with both CMOS and emerging technologies. He has published more than 30 top journals and conferences, including Nature Electronics, IEEE TCAD, IEEE TED, IEEE TVLSI, IEEE TCAS-II, IEEE Design & Test, ICCAD, DATE, IEDM, etc. He has received the best paper award nomination of ICCAD 2020, the Outstanding Research Assistant Award in the department of CSE at University of Notre Dame in 2017, and Bronze medal of Student Research Competition at ICCAD 2016, etc. Read more